1. Field of the Invention
Embodiments of the invention relate to the field of microprocessors, and more specifically, to memory organization.
2. Description of the Invention
In a typical processor system, memory is usually organized as a linearly addressed array of storage elements. This organization is suitable for code or program storage because instructions in a program are executed sequentially. For storage of certain types of data or for certain memory operations, the linear organization may be inefficient.
It may be desirable in many applications that the memory is organized according to the data structures operated on by the specific application. For example, in graphics and imaging applications, the basic data structure is a two-dimensional (2-D) array. In addition to providing the basic data blocks, 2-D arrays may also be used to construct multi-dimensional arrays. Accessing a 2-D array using the existing memory organization may incur processing overheads that cause inefficiency. In addition, screen refresh typically operates on a scan line at a time, and thus benefits when memory organization is more linear.